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| Name | Sajan Debnath |
| Affiliation | Department of Electrical & Electronic Engineering, Metropolitan University, Sylhet, Bangladesh |
Documents: 1
| Document title | Date | Issue | ||||
|
Design and Performance Analysis of 1 bit Full Adder in Subthreshold Region using 45nm Technology
Author(s): Sajan Debnath, Sayed Mohammad Reza Khurshid, and Enamul Haque Talal
|
2016 | 14 (3) , pp. 817-823 |
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